Feb 18, 2026
NVIDIA co-packaged optics with silicon photonics deliver 5x power efficiency and 10x resiliency, enabling scalable, high-performance networking for agentic AI.
Sep 17, 2025
The optical engine of a transceiver — whether co-packaged or part of a pluggable module — typically includes an electronic integrated circuit (EIC)
Aug 30, 2025
Compared to typical optoelectronic connectivity technology, CPO presents distinct benefits in terms of bandwidth, size, weight, and power
Dec 14, 2025
Connecting the Dots with Co-Packaged Optics Connecting fibers to these transceiver chiplets, or photonic ICs (PICs), in a precisely aligned and
Apr 25, 2026
STMicroelectronics enters high-volume PIC100 silicon photonics production for AI data centers. Here''s what 800G/1.6T co-packaged optics mean
Sep 27, 2025
CPO enhances interconnect bandwidth and energy efficiency by integrating optics and electronics within a single package, significantly shortening
Jun 09, 2026
Beat the co-package heat The research community and industry are asking questions about how to assemble these different technologies—photonics
Nov 21, 2025
What do co-packaged optics bring to AI factories? NVIDIA has designed CPO-based systems to meet unprecedented AI factory demands. By
Jun 20, 2026
We built co-packaged optics modules having polymer waveguide fiber interfaces successfully. We tested two types of assembly orders with Photonic-Integrated-Circuit (PIC) to Polymer Optical-Waveguides
Mar 16, 2026
Si photonics platform maturity and rapidly-developing ecosystems fuels the market share growth in datacom and pulls into its vicinity new developments in other markets.
Nov 29, 2025
Columbia Engineering featured an article about our recent Nature Photonics paper “3D Photonics for Ultra-Low Energy, High Bandwidth-Density Chip Data Links”. In this paper, the
May 22, 2026
Co-packaged optics (CPO) is a disruptive approach to increasing the interconnecting bandwidth density and energy efficiency by dramatically shortening the electrical link length through
Sep 15, 2025
NVIDIA today unveiled NVIDIA Spectrum-X™ and NVIDIA Quantum-X silicon photonics networking switches, which enable AI factories to connect
May 11, 2026
Co-Packaged Optics (CPO) is an emerging technology that integrates optical and electrical components within the same package, reducing power consumption,
Oct 24, 2025
Co-Packaged Optics applications require scalable and high-yield optical interfacing solutions to silicon photonic chiplets, offering low-loss, broadband, and polarization-independent
Jul 01, 2026
To achieve this, Co-packaged optics (CPO) is one of the future directions that leverages advanced packaging with integrated photonics. However, this tight integration complicates data
Feb 26, 2026
Leadership Technology for Silicon Photonics Industry demand for solutions like this is in part demonstrated by the Co-Packaged Optics Collaboration, founded by Microsoft and Facebook
May 23, 2026
In integrated photonics, coupling the optical signal in to and out of the chip present a unique challenge that requires precise alignment and complex packaging.
Aug 08, 2025
TSMC-SoIC face-to-face (F2F) technology for EIC and PIC bonding. A packaging war? Taiwan possesses a comprehensive and fully developed semiconductor manufacturing ecosystem. Taiwan
Nov 25, 2025
Co-Packaged Optics (CPO) has long promised to transform datacenter connectivity, but it has taken a long time for the
Jun 06, 2026
A co-packaged optic module design was developed to support electronic and optics compatibility, industry standards where applicable and scaling for design, process, assembly, test, pluggable
Oct 24, 2025
NVIDIA is developing a co-packaged optics (CPO) platform that integrates optical and electrical components to improve data-center connectivity,
Nov 12, 2025
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Nov 24, 2025
Some start-ups are also investigating photonic fabrics to connect multiple XPUs in a package. When there are many cores inside the package,
Jul 07, 2026
In this work, we present our scalable DWDM link architecture, designed with co-packaging in mind. We report device-level measurements of key components and validate comb-driven end-to-end data
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